Siemens MS45.1 DME
From BMWeb Wiki
| Unit | Engine computer (DME) |
|---|---|
| Cars | E46 six-cylinders, 2003 on |
| CPU | Motorola MPC555, 448 KB internal flash, 26 KB SRAM |
| External flash | AMD Am29BL802CB, 1 MB |
| EEPROM | 4 KB serial, on the QSPI |
| Diagnostics | KWP2000 on the K line, address 0x12 |
| Programming | 115200 8E1 by default, any rate by value |
| Validity | CRC-32/MPEG-2 and an RSA signature |
| Immobiliser | EWS3, a 16-bit ISN kept in flash |
The engine computer of the 2003-on E46 six-cylinders. Its memory, how its boot loader takes a flash, what decides whether the result starts, what it checks about itself while it runs, and how it is married to the immobiliser.
Hardware
A Motorola MPC555 with an external AMD Am29BL802CB, a 1 MB bottom-boot flash on a 16-bit bus. The program lives across both: part in the MPC555's internal flash (448 KB), the rest and the calibration in the external chip. A small serial EEPROM on the MPC555's QSPI holds what the DME learns.
RAM is 26 KB, not 32
The MPC555's SRAM is 0x3F9800-0x3FFFFF: 10 KB
from 0x3F9800 and 16 KB from 0x3FC000. The 6 KB
below it, 0x3F8000-0x3F97FF, is reserved in the
user's manual and does not exist on the chip. The DME agrees three ways:
the loader clears RAM from 0x3F9800, its RAM self-test covers
0x6800 bytes from there, and its diagnostic address table lists
RAM as 0x3F9800-0x3FFFFF.
firmware
"Unused" RAM is not free on a running engine
About 1.5 KB of RAM is never written once the program is running, as far as the code shows. Filling it with a pattern on a car stalled the engine at idle and reset the DME right after start-up, with faults for the engine speed limiter reset, the throttle start-up check and air temperature plausibility. The start and firing paths read RAM that the boot leaves initialised. car
The external chip
Sector layout from the datasheet, which is also how the DME is partitioned. Offsets are into the chip. firmware
| Offset | Size | Holds |
|---|---|---|
0x00000 | 16 KB | The reset vector at 0x100, the exception table and the first of the boot loader |
0x04000 | 8 KB | Boot loader: the hand-off to the program and the entry of its 9600 baud server, see below |
0x06000 | 8 KB | Boot loader |
0x08000 | 96 KB | Boot loader, including the flash drivers it copies to RAM, blank from 0x16934 to 0x1F7FF. At the top: the boot block checksum (0x1F800), the sector table (0x1F900), the immobiliser's ISN (0x1FB00) and the programming log (0x1FB34 up) |
0x20000 | 128 KB | More boot loader code (about 230 functions up to 0x37E8C), blank from about 0x38800. Erasing it destroys the loader. |
0x40000 | 128 KB | Calibration, 0x1D000 bytes of data, valid marks at the top |
0x60000 | 128 KB | Program |
0x80000 | 256 KB | Program |
0xC0000 | 256 KB | Program, valid marks at the top |
The chip is single-bank. While it erases or programs, every read returns status, so no code can run from it. Anything that writes the chip from the running program has to execute from SRAM or internal flash with interrupts off. Erase Suspend is ignored in burst mode, which the DME turns on at boot, so the chip cannot be erased with the engine running. firmware
The boot loader is not one build. Two DMEs of the same part number differ
in their boot blocks from 0x285B on; the flash driver inside
is byte for byte the same but sits 0x24 further along in one
of them. Code that looks for something in the boot region by address will
find it in one unit and not the other. car
The internal flash
The MPC555's 448 KB is 14 blocks of 32 KB in two modules, programmed in
64-byte pages. The DME programs it with the chip maker's own driver, which
the loader keeps in the 96 KB boot sector (0x14AFC-
0x162F8) and copies to RAM for the job. That driver programs
one page in every selected block per pulse sequence: a page takes about
24.6 ms on silicon whether it is one block or twelve, so the same data
goes in about four times faster when the blocks are written side by side.
Programming needs the EPEE pin, which the loader raises on a MIOS port pin
(0x306100 bit 0x40) before any flash work;
without it the driver refuses with 0x87.
car firmware
The serial EEPROM
A 4 KB (32 Kbit) part on QSPI chip select 1. Reading 64 KB of it gives
the same 4 KB sixteen times, because the address wraps, so a write past
0xFFF lands on real data. car
- Read at boot, written in the after-run. The stored data (adaptions, faults, mileage, the immobiliser record) is read once at start-up and written back only after the ignition goes off, each record twice with a read-back: about 1200 writes on a blank part, 35 s of after-run. emulator
- Only the program sets the QSPI up. The boot loader never touches the QSPI module, so anything that runs before the program finds it at its reset state: slave mode, pins as plain I/O. A read started in that state waits for ever and the watchdog resets the DME. car
- "RAM check" means the EEPROM. Fault 2869 (P16A3, "self-test: RAM check") is set when the stored-data restore at boot fails: one block is kept three times and must agree two of three, another must hold a valid record. A blank or torn EEPROM fails it; a DME with its own EEPROM passes. It is not about the SRAM. emulator car
The programming session
This is the order of jobs in a whole-program flash, from a real flasher log. The emulated DME answers every step the same way. car emulator
1A 89 read serial number
31 07 03 <4 bytes> read the seed
31 08 00 00 00 10 <key> send the key -> 71 08 01 accepted, 71 08 00 refused
10 85 05 programming session, 115200 baud
83 03 00 78 18 F0 00 timing: P2max 3 s, P3min 12 ms
31 02 06 00 00 02 0A 00 00 erase the program: 0x02060000 + 0xA0000
34 .. 36 .. 37 download the external program, 253-byte blocks
34 00 00 00 06 00 07 00 00 download the internal flash: 0x06000000 + 0x70000
31 02 04 00 00 02 02 00 00 erase the calibration: 0x02040000 + 0x20000
34 04 00 00 02 00 01 D0 00 download the calibration
10 81 01 default session, 9600 baud (the loader keeps running)
31 09 02 check the program signature -> 71 09 01
31 09 04 check the data signature -> 71 09 01
11 01 reset
-
Addresses go as bytes 2, 1, 0, then 3. The external chip is
0x02000000+ offset and the internal flash0x06000000+ offset. There is no separate erase for the internal flash: erasing the program region erases the external program sectors and all of the internal flash. emulator - The erase is categorical. The range in the request is ignored: asked for the top 64 KB, the first 64 KB or the internal window, the loader wipes the same whole program area plus all of the internal flash every time. Only the calibration erase is its own category, so there is no partial program flash. emulator
-
The key answer is
71 08 01for accepted. A positive answer71 08 00means the key was refused, so checking only for71passes a wrong key. car - The serial number used for the key is the last four bytes of the answer's payload, not of the telegram, which ends in a checksum. car
- Reading needs no unlock. A calibration read works in the default 9600 baud session. car
- The first erase hands over. The running program takes the first erase request, shuts itself down and jumps into the boot loader. That request is never answered; the next one is served by the loader. emulator
-
The log entry comes last, and only then. The programming log write
(
3D) is accepted only after an erase and a download in the same programming session; at any other time it is refused with7F 3D 22. A tool that only checks signatures can never add an entry. emulator
Baud rate is a parameter
The loader's 10 85 <code> takes codes 0-5 from a table:
2400, 9600, 19200, 38400, 57600, 115200. Any code of 6 or more is followed by
a 24-bit baud rate, so 10 85 06 03 D0 90 asks for 250000, and
the answer echoes it. The serial divider is round(1250000 / baud). The stock
loader can therefore run any rate the line carries without a patch.
emulator
Timing
| What | Value | |
|---|---|---|
| Gap before the next request (P3min) | Exactly 12 ms. The loader refuses any other value with 7F 83 22, and a request sent sooner is silently dropped and only taken on the retry, which costs a whole answer timeout. | emulator |
| Erase | About 10 s of 7F 31 23 (busy, ask again) before 71 02 01 | car |
| One 253-byte block at 19200 | About 200 ms, occasionally 670 ms. A 500 ms timeout aborts a program flash part way. | car |
| One block at 115200 | About 47 ms: 24.6 ms on the wire, about 10 ms in the loader, the answer and the 12 ms gap | emulator |
| Internal flash on silicon | About 24.6 ms per 64-byte page when programmed one page at a time. Its driver can program the same page in every selected block in one pulse sequence, about 6 ms per page across 12 blocks. | car |
| Erasing the internal flash | Under a second for any set of blocks, done as one job: 875 ms for one block, 956 ms for twelve. | car |
A block answer is 76 <counter, 2 bytes> <status>,
with status 01 for written and 02 for failed.
Blank blocks can be skipped
After an erase, downloading only the runs of bytes that are not
FF leaves the chip identical to a full write. The signature
check passes and the program starts. Runs may start at odd addresses and be
a single block long. The stock calibration has 125 of 470 blocks blank at the
end, the external program 535 of 2590. emulator
The loader does not clamp a download to the erased sector
A range that ran from the erased calibration across 0x5D000
into the unerased program was accepted and programmed into it. Programming
only clears bits, so that corrupts the program. A tool that sends runs must
clamp them to the region it erased. emulator
Hand-off or park
At every reset the loader runs first, from the vector at 0x100.
About 117 µs in, it has checked the flash and takes one of two roads.
emulator
-
Hand-off. With a valid program and calibration it jumps to the
program through one branch at
0x4EBC. Nothing else in the loader runs again until the next reset or the next programming session. -
Park. When the checks fail it waits a moment, then calls its
9600 baud server at
0x5228: an idle loop over a countdown table and a list of callbacks that answers identification, the status job and a new flash for as long as the power stays on. A valid boot never executes that call.
Content decides, not the marks on their own. Blank valid marks with a
good calibration still start the program, because the loader re-verifies
the checksums; invalid content parks it. A read over diagnostics shows the
marks as FF anyway, so a dump never tells you whether they
are set. emulator car
Parked, the loader answers a tester at 9600 like a running DME would:
3E (tester present), the hardware reference
(22 25 02, "0044570" on this unit), the other reference
numbers, and 31 0A with status 0C. A read of
the programming log then comes back all FF if the top sector
was erased. car
A factory flash leaves the loader alone
The whole-program session above writes the external program
(0x60000-0xFFF3F), the internal flash and the
calibration. Nothing in it touches the boot region below
0x40000, and nothing could: the loader's sector table at
0x1F900 gives the boot sector no write permission, so no
erase or download request reaches it, whatever address it names. The
only writes into that sector are the loader's own, its programming log
entries. emulator firmware
The other way round, code running on the DME itself can rewrite the boot sector: the chip has no hardware protection there. A power loss between erasing the 96 KB sector and writing it back leaves a DME that neither boots nor flashes, because the loader that would serve a new flash is what was erased. Only a hardware programmer brings such a unit back. emulator
What makes a flash valid
The loader computes checksums in the background, ten bytes per pass, both CRC-32/MPEG-2. emulator
- Program: over the internal flash and the external program, stored at
0x60000and0x60340. - Calibration: over
0x40200-0x5CFFF, with start, end and initial value from the header at0x40104, stored at0x40100. The running program re-checks the same range in the background.
31 09 then checks the references and an RSA signature over the
MD5 of the listed segments. On success it writes marks into the last bytes of
the sector. emulator
| Complete | Signature checked | |
|---|---|---|
| Program | 0xFFF80 = 42902448 | 0xFFFC0 = 42244890 |
| Calibration | 0x5FF80 = 48249042 | 0x5FFC0 = 90482442 |
Status after a flash
31 0A reports where the loader stands. emulator
| Status | Meaning |
|---|---|
01 | Normal |
05 | Program signature not checked |
06 | Data signature not checked |
07 | Interrupted, still in the programming session at 115200 and deaf to a tester at 9600 |
0C | Program not complete, after an ignition cycle at 9600; a new flash is taken |
0F | The calibration's stored checksum does not match its content; 31 09 04 answers 71 09 00 |
A half-written program is recoverable: after an erase the DME stays in its boot loader and accepts a new program flash. car
What the program checks about itself
Once running, the program keeps testing its own memory. Two of those tests matter to anyone who changes the flash. firmware emulator
ROM test level 1: three checksums, including the boot block
A background task walks a CRC-32/MPEG-2 over three ranges in turn, each described by a small table in the flash with its seed and stored word beside it. One full walk takes about 5 s.
| Phase | Range | Stored word |
|---|---|---|
| Boot block | External 0x0-0x1EFFF, from the words at 0x1F808 and 0x1F80C, seed at 0x1F9F0 | 0x1F800 |
| Program | Internal 0x0-0x6FFFF, then external 0x60608-0xFFF3F, header at 0x60004-0x60014 | 0x60000 |
| Calibration | From the table at 0x40108; skipped when the halfword at 0x40114 is blank | in the header |
A changed boot block with an old checksum resets the car every 5 s
Any phase failing sets the self-reset's code 11. The DME resets at the
end of every walk and stores fault 28B2 (P16C3, "engine speed limitation:
reset") with reason "11 ROM Test Level 1". A DME that ran fine on the
bench and reset every 5-10 s in the car had exactly this: its boot
region had been changed and the word at 0x1F800 had not.
A program flash cannot cure it, because a program flash never writes the
boot region; only rewriting the boot sector with a matching word does.
The loader carries the same walker but boots the program with a stale
word all the same, which is why the fault shows up only with the engine
running. car
The range excludes the top 2 KB of the sector: the sector table, the ISN
and the programming log can change without touching the word. The safety
monitor's own code sum ("ROM test level 2", stored at 0x60600)
is a separate, simpler sum over the program and is what a patched program
has to correct as well.
Reset reasons
The DME keeps a record of its own resets in RAM with a reason code. A reset without a record came from outside the program: the watchdog, or the monitoring module. Code 11 is the checksum walk above; the watchdog is serviced at the very end of the 10 ms task chain, so a watchdog reset means the chain did not finish, an unexpected exception or a jump into erased flash. A program patch that ran correctly at idle on the emulator and reset the real car at 3100-3400 rpm under load left no record: it ran its extra code from the external chip on paths the idle run never took, and the 10 ms budget was exceeded. car firmware
The programming log
Every successful flash leaves an entry (the AIF, in the diagnostic
description's terms) in the tail of the boot sector, external
0x1FB34-0x1FFFF, in 64-byte slots. A slot is
empty when its first byte is FF; every reader walks from the
first slot and stops at the first empty one. firmware
emulator
-
14 entries, not 19. 19 slots fit in the area, but the DME's log
read (a window of service
23, what the description's AIF_LESEN uses) answers offsets below0x380and refuses the rest with7F 23 52, even with 19 slots written. The description counts 14 free, and so does the DME. emulator - The identity lives here. The VIN, the programming date, the software and assembly numbers that a tester shows for the DME come from the newest entry. A DME whose log is blank identifies with those fields empty, and its next entry gets software number 0000000, because the previous one was the only copy. car
- The boot block checksum excludes it, so entries can be added without changing anything else, which is how the loader itself adds them. Flash only clears bits: a change that only clears bits can be programmed over a slot in place, anything else means rewriting the sector. emulator
A slot
Decoded by running AIF_LESEN on marked slots; all fields round-trip. Offsets are into the slot. BMW data emulator
| Offset | Field | Form |
|---|---|---|
0x01-0x07 | VIN, the last 7 characters | ASCII |
0x09-0x0B | Date | BCD YY MM DD |
0x0C-0x11 | Assembly number (ZB) | BCD, 6 bytes |
0x12-0x17 | Software number | BCD, 6 bytes |
0x18-0x1D | Approval (authority) number | BCD, 6 bytes |
0x1E-0x20 | Dealer number | BCD |
0x21-0x25 | Tester serial | ASCII |
0x26 | Mileage | one byte, × 600 km |
0x27-0x32 | Programming reference | ASCII |
0x33-0x3C | VIN, the first 10 characters | ASCII |
The immobiliser
The DME is married to the car's EWS3 by a 16-bit number, the ISN. The two talk over their own wire with a rolling code; the number itself never goes over the K line in plain. Found on three DMEs and settled by pairing two of them to one car. car firmware
Where the ISN is
In the external flash at 0x1FB00, as three transformed copies
of the value V that the boot code votes on, after a marker halfword
(FEFE, ECEC or C8C8):
| Bytes | Holds | For V = A356 |
|---|---|---|
| 0-1 | ~V, both bytes inverted | 5C A9 |
| 2-3 | V with the high byte inverted | 5C 56 |
| 4-5 | V with the low byte inverted | A3 A9 |
Bytes 2-3 read raw give the wrong number, which is an easy mistake: only
the low byte of that copy is straight. 0x1FB00 sits above the
boot block checksum's range, so writing it changes no checksum.
The EEPROM record is not the ISN
The DME also keeps a 12-byte identity record in its EEPROM at
0x04 (a copy at 0x14): a 32-bit value and two
masked copies of it. It is a per-unit number. Two DMEs with different
values there both started the same car once their flash ISNs matched
the EWS; the record never changed through pairing. Reading the ISN from
the EEPROM gives a number that means nothing to the EWS.
car
The EWS3 will not tell you its ISN
The EWS3 (DS2 address 0x44) answers identification (part
6905670) and its status, and refuses ISN_LESEN and PASSWORT_LESEN with
A2 on a paired car with the ignition on. There is no
precondition it waits for: in BMW's own description both jobs are one
bare telegram each, with no login or state job in front. A paired EWS3
declines by policy, so the car's ISN has to come from its original DME,
read from 0x1FB00 of a dump. car
BMW data
Pairing a used DME
- Write the car's ISN into the used DME's triple at
0x1FB00. - Run the EWS start-value sync (the EWS3 description's WECHSELCODE_SYNC_DME and the DME's start-value jobs), which realigns the rolling code. The telegram to the EWS is
44 04 67; nothing secret crosses the K line. - Ignition off for 20 s, then crank. The pairing is committed by a real start; it may take two attempts.
The DME's lock flag (STATUS_EWS_LOCK, 21 49, LV_LOCK_IMOB)
reads 1 right up until the engine actually starts. A 1 after a good sync
is not a failure. Done twice with two different donor DMEs; the car
started both times. car
How fast the K line goes
With the DME's serial port set to each rate, over a K+DCAN cable on one car. car
| Baud | Result |
|---|---|
| 156250, 208333, 250000 | Clean |
| 312500 | Clean in short tests, two garbled answers in about 300 during a long write |
| 416667, 625000 | The DME hears the tester, its answers arrive garbled |
The K-line transceivers documented for this era are rated to about 200 kBaud, so anything above that is outside spec and depends on the cable and the car. A line that is one-way at a high rate is a trap: the DME takes the request to switch and the tester never hears the confirmation, so a tool must fall back on its own when no answer comes.
Reading values while it runs
The stock program serves a logger in the default session, with no authentication. Measured on the emulated DME with the engine stopped. emulator
| Request | Gives |
|---|---|
10 81 05 | The default session at 115200 baud (03 is 38400). Answered at the old rate, then the line switches. |
83 03 04 01 18 14 00 | Access timing at the session's limits: the DME answers after 2 ms instead of 25 and takes the next request 12 ms after its answer instead of about 27. Only exactly these values are accepted; anything else is 7F 83 22. 83 00 reads the limits, 83 01 goes back to the defaults. |
2C F0 then 03 <pos> <size> <addr24> per piece | Defines local identifier F0 from memory: up to 42 pieces in one request, pos the 1-based position in the packet. A second request replaces the first; 2C F0 04 clears it. |
21 F0 | The packet. |
23 <addr24> <size> | Memory: RAM from 0x3F9800 and the internal flash, up to 250 bytes. 251 to 254 get no answer at all; the external flash is refused with 7F 23 52. |
A 30-byte packet read back to back: 103 ms a read at 9600 (10 Hz), 57 ms
at 115200 (17 Hz), 20 ms at 115200 with the timing set (50 Hz). About
9 ms is the floor; the diagnostic task comes round no sooner. The
programming session has the same timing limits but refuses 21,
22, 2C and 18, so it is no use for
logging. A real cable has to turn round in 2 ms for the fast timing: an
FTDI adapter needs its latency timer at 1 ms, not the default 16.
The calibration definition
Checked by running the program and comparing every read it makes against the community XDF. emulator
- Coverage is complete. All 4,325 single-value reads land on a defined constant with the right start and size, and every table the lookup routines are handed is defined.
- One axis is missing: a 6-point 16-bit axis at calibration
0x8E30, used by the cruise control. - 320 items have no description, 264 constants and 56 tables.
- One scaling looks wrong:
c_temp_cur_on_ls_downis defined as 1/16 °C, but the variable it is compared with is 1/64 °C minus 33. Of 359 constants whose scale the code reveals, the other 354 agree.
See also
- Diagnostics and the K line - How the E46-era units talk on the K line, what their answers mean, and what the cables and adapters in between can carry
- GS20 automatic gearbox - The control unit of the E46's five-speed GM automatic